Makefile : why pu .o instead of .c in dependencies? -


in tutorial : http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/

i don't understand why uses .c dependencies in makefile1 , .o in makefile2. can put .o , .c regardless in gcc ? what's advantage of using .o ?

1) it's right there in tutorial: "by putting object files--hellomake.o , hellofunc.o--in dependency list , in rule, make knows must first compile .c versions individually, , build executable hellomake." not strictly correct, can see author meant.

2) can either way, should aware of these 2 methods do. also, compare:

gcc -o hellomake hellomake.c hellofunc.c -i.  gcc -o hellomake hellomake.o hellofunc.o

the -i. isn't needed in second usage; compiler can't use , ignore it. (yes, know command in tutorial uses it-- author wrong.)

3) biggest advantage know of ability keep object files (foo.o) avoid unnecessary recompilation later; there may others.


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